A traditional PLL reference switch is shown in FIG. 1. Phase detector PD determines the phase error (Pref) between the selected reference and the output (Pdco) of the local digital controlled oscillator DCO. During normal operation, the PLL takes the selected reference clock, for example, Pref1, and adjusts the DCO output frequency so that the DCO is locked to the selected reference. The output of the phase detector PD is therefore forced to zero. Traditional phase-locked techniques are described in F. M. Gardner, “Phase-Lock Techniques”, New York: Wiley, 1979, the contents of which are herein incorporated by reference.
In FIG. 1, Fc is the DCO center frequency. The output of the low pass filter (LP) creates the DCO frequency adjustment by filtering out the noise in the phase error. This is added to the center frequency of the DCO before being applied to the DCO input. When the selected reference Pref1 becomes unavailable or unstable, the reference selection unit changes the reference to the other source, Prefm, and DCO is then locked to the new reference. In general, all the references can be traced to a single source.
The problem the traditional method of switching references is that the initial phase offset will be different for different references and a phase correction has to be made during the switching operation. However, the actual phase may not be known exactly because both references will have noise in their phase. However, a phase error always exists during the switching operation, and its value depends on the stability of selected reference. This will result in a phase jump when the switch occurs.
Also, after switching, the low-pass filter still contains the memory of the phase error between local DCO and the first reference clock. This memory will affect the transit during the switching operation.